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Volumn , Issue , 2002, Pages 58-67

Bytecode fetch optimization for a Java interpreter

Author keywords

[No Author keywords available]

Indexed keywords

BENCHMARK PROGRAMS; BYTECODES; EXECUTION ROUTINE; INDIRECT BRANCH; INSTRUCTION CACHE MISS; JAVA BYTE CODES; JUST IN TIME COMPILERS; MEMORY ACCESS; NOVEL TECHNIQUES; POWER3 PROCESSORS; POWERPC PROCESSORS; SUPERSCALAR PROCESSOR; VIRTUAL MACHINES;

EID: 0036957242     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/605397.605404     Document Type: Conference Paper
Times cited : (5)

References (31)
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  • 4
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    • Indirect threaded code
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    • Threaded Code
    • Erti, A.1
  • 7
    • 84937415475 scopus 로고    scopus 로고
    • The behavior of efficient virtual machine interpreters on modern architectures
    • LNCS 2150
    • M. A. Erti and D. Gregg. The Behavior of Efficient Virtual Machine Interpreters on Modern Architectures. Euro-Par 2001.LNCS 2150, pp. 403-412. 2001.
    • (2001) Euro-Par 2001 , pp. 403-412
    • Erti, M.A.1    Gregg, D.2
  • 8
    • 84957010177 scopus 로고    scopus 로고
    • Implementing an efficient java interpreter
    • LNCS 2110
    • D. Gregg, M. A. Erti, and A. Krall. Implementing an Efficient Java Interpreter. HPCN Europe 2001. LNCS 2110, pp. 613-620. 2001.
    • (2001) HPCN Europe 2001 , pp. 613-620
    • Gregg, D.1    Erti, M.A.2    Krall, A.3
  • 11
    • 23044518162 scopus 로고    scopus 로고
    • Pipelined java virtual machine interpreters
    • Mar., LNCS 1781
    • J. Hoogerbrugge and L. Augusteijn. Pipelined Java Virtual Machine Interpreters. CC/ETAPS 2000. LNCS 1781, pp. 35-49. Mar. 2000.
    • (2000) CC/ETAPS 2000 , pp. 35-49
    • Hoogerbrugge, J.1    Augusteijn, L.2
  • 12
    • 84862474438 scopus 로고    scopus 로고
    • Available at
    • HPM Tool Kit. Available at 'http://www.alphaworks.ibm.com/tech/ hpmtoolkit/'.
    • HPM Tool Kit
  • 13
    • 33845405351 scopus 로고    scopus 로고
    • Java Technology Edition. Available at
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  • 19
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    • POWER3: The next generation of PowerPC processors
    • Nov.
    • F. P. O'Connel and S. W. White. POWER3: The next generation of PowerPC processors. IBM Journal of Research and Development, Vol. 44(6), pp. 873-884. Nov. 2000.
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    • O'Connel, F.P.1    White, S.W.2
  • 26
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    • available at, and SPECjbb-2000, available at 'http://www.spec.org/osg/ jbb2000/
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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.