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Volumn 29, Issue 11, 1999, Pages 1005-1023

Code compression system based on pipelined interpreters

Author keywords

[No Author keywords available]

Indexed keywords

CODES (SYMBOLS); COMPUTER ARCHITECTURE; COMPUTER SYSTEMS PROGRAMMING; DATA COMPRESSION; DATA STORAGE EQUIPMENT; PIPELINE PROCESSING SYSTEMS; PROGRAM COMPILERS; RESPONSE TIME (COMPUTER SYSTEMS);

EID: 0032644593     PISSN: 00380644     EISSN: None     Source Type: Journal    
DOI: 10.1002/(SICI)1097-024X(199909)29:11<1005::AID-SPE270>3.0.CO;2-F     Document Type: Article
Times cited : (47)

References (24)
  • 2
    • 0005389034 scopus 로고
    • Thumb squeezes ARM code size
    • J. L. Turley, 'Thumb squeezes ARM code size', Microprocessor Report, 9(4), (1995).
    • (1995) Microprocessor Report , vol.9 , Issue.4
    • Turley, J.L.1
  • 4
    • 0010232296 scopus 로고    scopus 로고
    • The TriMedia TM-1 PCI VLIW mediaprocessor
    • Stanford, CA, August
    • G. A. Slavenburg, S. Rathnam and H. Dijkstra, 'The TriMedia TM-1 PCI VLIW Mediaprocessor', Hot Chips 8, Stanford, CA, (August 1996).
    • (1996) Hot Chips 8 , vol.8
    • Slavenburg, G.A.1    Rathnam, S.2    Dijkstra, H.3
  • 5
    • 0345683306 scopus 로고    scopus 로고
    • TriMedia Division, Philips Semiconductors, TriMedia Product Group, 811 E. Arques Avenue, Sunnyvale, CA 94088
    • G. A. Slavenburg, TM1000 Databook, TriMedia Division, Philips Semiconductors, TriMedia Product Group, 811 E. Arques Avenue, Sunnyvale, CA 94088. www.trimedia.philips.com, 1997.
    • (1997) TM1000 Databook
    • Slavenburg, G.A.1
  • 6
    • 84938015047 scopus 로고
    • A method for construction of minimum redundancy codes
    • D. A. Huffman, 'A method for construction of minimum redundancy codes', Proc. of the IEEE, 40, 1098-1101 (1952).
    • (1952) Proc. of the IEEE , vol.40 , pp. 1098-1101
    • Huffman, D.A.1
  • 20
  • 21
    • 0019610106 scopus 로고
    • Interpretation techniques
    • Paul Klint, 'Interpretation techniques', Software - Practice & Experience, 11(9), 963-973 (1981).
    • (1981) Software - Practice & Experience , vol.11 , Issue.9 , pp. 963-973
    • Klint, P.1
  • 22
    • 0002017307 scopus 로고
    • Instruction-level parallel processing: History, overview, and perspective
    • B. Ramakrishna Rau and J. A. Fisher, 'Instruction-level parallel processing: history, overview, and perspective', The Journal of Supercomputing, 7(1/2), 9-50 (1993).
    • (1993) The Journal of Supercomputing , vol.7 , Issue.1-2 , pp. 9-50
    • Ramakrishna Rau, B.1    Fisher, J.A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.