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Volumn , Issue , 2002, Pages 156-161

Formal verification in a component-based reuse methodology

Author keywords

Formal verification; IP; Model checking; Reuse; Timed Petri nets

Indexed keywords

COMPUTER AIDED DESIGN; COMPUTER SIMULATION; COMPUTER SOFTWARE REUSABILITY; EMBEDDED SYSTEMS; MATHEMATICAL MODELS; PETRI NETS;

EID: 0036957225     PISSN: 10801820     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/581199.581235     Document Type: Conference Paper
Times cited : (6)

References (9)
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    • 0003381961 scopus 로고    scopus 로고
    • Design methodology for IP providers
    • J. Haase, "Design Methodology for IP Providers", Proc. DATE 1999, 728-732.
    • Proc. DATE 1999 , pp. 728-732
    • Haase, J.1
  • 4
    • 44949202069 scopus 로고    scopus 로고
    • Verification of embedded systems using a petri net based representation
    • L.A. Cortés, P. Eles, Z. Peng, "Verification of Embedded Systems using a Petri Net based Representation", Proc. ISSS 2000, 149-155.
    • Proc. ISSS 2000 , pp. 149-155
    • Cortés, L.A.1    Eles, P.2    Peng, Z.3
  • 6
    • 0012523125 scopus 로고    scopus 로고
    • UPPAAL homepage
    • UPPAAL homepage: http://www.uppaal.com.
  • 8
    • 0026392075 scopus 로고    scopus 로고
    • Building a predictable avionics platform in ada: A case study
    • C.D. Locke, D.R. Vogel, et al., "Building a Predictable Avionics Platform in Ada: A Case Study", Proc. RTSS 1991, 181-189
    • Proc. RTSS 1991 , pp. 181-189
    • Locke, C.D.1    Vogel, D.R.2
  • 9
    • 0012619393 scopus 로고    scopus 로고
    • A single-chip, 1.6-bill., 16-b MAC/s multiprocessor DSP
    • B. Ackland, A. Anesko, et al., "A Single-Chip, 1.6-Bill., 16-b MAC/s Multiprocessor DSP", Journ. of Solid-State Circ., 35, 3, 2000.
    • (2000) Journ. of Solid-State Circ. , vol.35 , pp. 3
    • Ackland, B.1    Anesko, A.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.