A novel stack capacitor cell for high density FeRAM compatible with CMOS logic

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2002, Pages 543-546

  Hayashi, Takahisa ^a   Igarashi, Yasushi ^a   Inomata, Daisuke ^a   Ichimori, Takashi ^a   Mitsuhashi, Toshirou ^a   Ashikaga, Kinya ^a   Ito, Toshio ^a   Yoshimaru, Masaki ^a   Nagata, Masaya ^b   Mitarai, Shun ^b   Godaiin, Hironori ^b   Nagahama, Tsutomu ^b   Isobe, Chiharu ^b   Moriya, Hiroyuki ^b   Shoji, Mitsuharu ^b   Ito, Yasuyuki ^b   Kuroda, Hideaki ^b   Sasaki, Masayoshi ^b  

^a OKI ELECTRIC INDUSTRY CO   (Japan)

^b SONY CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

CAPACITORS; CMOS INTEGRATED CIRCUITS; CRYSTALLIZATION; LOW TEMPERATURE EFFECTS; OXIDATION; RAPID THERMAL ANNEALING; SEMICONDUCTOR DEVICE MANUFACTURE;

THERMAL BUDGET;

RANDOM ACCESS STORAGE;

EID: 0036932384     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

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2. B. Yang, Y.M. Kang, S.S. Lee, K.H. Noh, N.K. Kim, S.J. Yeom, N.S. Kang, and H.G. Yoon, "Highly Reliable 1Mbit Ferroelectric Memories with Newly Developed BLT Thin Films and Steady integration Schemes", IEDM Digest of Technical Papers, 2001, pp.791-794.
3. Tatsuya Yamazaki, Ken-ichi Inoue, Hisashi Miyazawa, Mitsuhiro Nakamura, Naoya Sashida, Rei Satomi, Andrew Kerry, Yoshikazu Katoh, Hideyuki Noshiro, Kazuaki Takai, Rika Shinohara, Chikai Ohno, Tetsuya Nakajima, Yuji Furumura and Seiichiro Kawamura, "Advanced 0.5□m FRAM Device Technology with Full Compatibility of Half-Micron CMOS Logic device", IEDM Digest of Technical Papers, 1997, pp.613-616.