A physics based approach to ultra-shallow p+-junction formation at the 32 nm node

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2002, Pages 879-882

  Mokhberi, Ali ^a   Pelaz, Lourdes ^b   Aboy, Maria ^b   Marques, Luis ^b   Barbolla, Juan ^b   Paton, Eric ^c   McCoy, Steve ^d   Ross, Jonathan ^d   Elliott, Kiefer ^d   Gelpey, Jeffrey ^d   Griffin, Peter B ^a   Plummer, James D ^a  

^a STANFORD UNIVERSITY   (United States)

^b UNIVERSITY OF VALLADOLID   (Spain)

^c ADVANCED MICRO DEVICES   (United States)

^d Vortek Industries Ltd   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

ACTIVATION ENERGY; AMORPHIZATION; ANNEALING; COMPUTER SIMULATION; DIFFUSION IN SOLIDS; POINT DEFECTS; SEMICONDUCTING BORON;

TRANSIENT ENHANCED DIFFUSION (TED);

SEMICONDUCTOR JUNCTIONS;

EID: 0036928258     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. J. O. Borland, "Low Temperature Shallow Junction Formation for 70nm Technology Node and Beyond," in proceedings of Silicon Front-End Junction Formation Technologies (Meterial Research Society, San Francisco, CA, 2002), vol. 717, C1.1.
2. 2, Arsenic, and Phosphorus Implanted Silicon," IEEE Transactions on Electron Devices, 49, 1183, (2002).
3. Lever, R.F.; Bonar, J.M.; Willoughby, A.F.W., "Boron diffusion across silicon-silicon germanium boundaries", J. Appl. Phys., 83, 1988, (1998).
4. H. Bracht, E. E. Haller, K. Eberl, M. Cardona, and R. Clark-Phelps, "Self-diffusion in isotopically controlled heterostructures of elemental and compound semiconductors," Conference on Diffusion Mechanisms in Crystalline Materials, edited by Y. Mishin, G. Vogl, N. Cowern, R. Catlow, and D. Farkas (Materials Research Society, Warrendale, PA, 1998), vol. 527, pp. 335-346.
5. Ural, P. B. Griffin, J. D. Plummer, "Self-diffusion in silicon: similarity between the properties of native point defects," Phys. Rev. Lett., vol. 83, pp. 3454-3457, Oct. 1999.
6. R. B. Fair, J. C. C. Tsai, Impurity Doping Processes in Silicon, ed. F. F. Y. Wang, Amsterdam, North Holland, 1981.
7. J. C. Gelpey, K. Elliott, D. Camm, S, McCoy, J. Ross, D. F. Downey, E. A. Arevalo, "Advanced annealing for sub-130nm junction formation," in press.
8. International Technology Roadmap for Semiconductors, Sematech, Front End Processes pp. 20-24, 2001.