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Volumn 32, Issue 1-2, 2002, Pages 111-131

Chip design of MFCC extraction for speech recognition

Author keywords

FPGA; Mel frequency; MFCC; Speech recognition; VLSI

Indexed keywords

ALGORITHMS; COMPUTATIONAL COMPLEXITY; DIGITAL ARITHMETIC; FIELD PROGRAMMABLE GATE ARRAYS; MICROPROCESSOR CHIPS; SPEECH RECOGNITION;

EID: 0036859613     PISSN: 01679260     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0167-9260(02)00045-7     Document Type: Article
Times cited : (58)

References (19)
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  • 12
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    • Stefanelli, R.1
  • 15
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    • Mandelbaum D.M. Some results on a SRT type division scheme. IEEE Trans. Comput. 42:1993;102-106.
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    • Mandelbaum, D.M.1
  • 17
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    • Measuring the accuracy of ROM reciprocal tables
    • DasSarma D., Matula D.W. Measuring the accuracy of ROM reciprocal tables. IEEE Trans. Comput. 43:1994;932-940.
    • (1994) IEEE Trans. Comput. , vol.43 , pp. 932-940
    • DasSarma, D.1    Matula, D.W.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.