A VLSI CHIP for isolated speech recognition system

IEEE Transactions on Consumer Electronics

Volumn 42, Issue 3, 1996, Pages 458-467

  Kirn, Sung Nam ^a   Hwang, In Chul ^a   Kirn, Young Woo ^a   Kim, Soo Won ^a  

^a Korea University   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; INTEGRATED CIRCUIT LAYOUT; PATTERN RECOGNITION SYSTEMS; SPEECH RECOGNITION;

DYNAMIC TIME WARPING; LINEAR PREDICTIVE COEFFICIENT;

VLSI CIRCUITS;

EID: 0030218427     PISSN: 00983063     EISSN: None     Source Type: Journal    
DOI: 10.1109/30.536143     Document Type: Article

References (7)

1. L. F. Lamel, L. R. Rabiner, A. E. Rosenberg, and J. G. Wilpon, "An Improved Endpoint Detector for Isolated Word Recognition," IEEE Tr. on Acoustics, Speech and Signal Process -ing, ASSP-29, No. 4, pp. 777-785, Aug. 1981
2. L. R. Rabiner, and M. R. Sambur, "An Algorithm for Determining the Endpoints of Isolated Utterances," Bell Syst. Tech. J., pp. 777-785, Vol. 54, pp. 297-315, Feb. 1975
3. An-Nan Suen, Jhing-Fa Wang, and Yuen-Lin Chiang, "A Cepstrum Chip : Architecture and Implementation," IEEE International Sym. on Circuit and Systems, Vol. 2, pp. 1428-1432, 1995.
4. D. A. Patterson, J. L. Hennesy, Computer Organization & Design: The Hardware and Software interface, Morgan Kaufmann Pub., 1994.
5. B. J. Benschneider et. al., "A pipelined 50-MHz CMOS 64-bit Floating Point Arith -matic processor," L, Vol. 24, No. 5, Oct. 1989.
6. Cory Myers, Lawrence R. Ribiner, Arron E. Rosenberg, "Performance Tradeoff in Dynamic Time Warping Algorithms for Isolated Word Recognition," IEEE Tr. on ASSP-28, No. 6, Dec. 1980.
7. L. Rabiner, B.H. Hwang, Fundamentals of Speech Recognition, Prentice Hall, 1993.