-
4
-
-
0031648315
-
Implementing distributed packet fair queueing in a scalable switch architecture
-
Mar.
-
D.C. Stephens and H. Zhang, "Implementing distributed packet fair queueing in a scalable switch architecture," in Proc. IEEE INFOCOM'98, Mar. 1998, pp. 282-290.
-
(1998)
Proc. IEEE INFOCOM'98
, pp. 282-290
-
-
Stephens, D.C.1
Zhang, H.2
-
5
-
-
0011117501
-
-
M.S. thesis, Dept. Elect. Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA
-
D.C. Stephens, "Implementing Distributed Packet Fair Queueing in a Scalable Switch Architecture," M.S. thesis, Dept. Elect. Comput. Eng., Carnegie Mellon Univ., Pittsburgh, PA, 1998.
-
(1998)
Implementing Distributed Packet Fair Queueing in a Scalable Switch Architecture
-
-
Stephens, D.C.1
-
6
-
-
0033293255
-
Providing QoS guarantees in packet switches
-
Rio de Janeiro, Brazil, Dec.
-
F.M. Chiussi and A. Francini, "Providing QoS guarantees in packet switches," in Proc. IEEE GLOBECOM '99, High-Speed Networks Symp., Rio de Janeiro, Brazil, Dec. 1999.
-
(1999)
Proc. IEEE GLOBECOM '99, High-Speed Networks Symp.
-
-
Chiussi, F.M.1
Francini, A.2
-
7
-
-
0034462558
-
A distributed scheduling architecture for scalable packet switches
-
Dec.
-
_, "A distributed scheduling architecture for scalable packet switches," IEEE J. Select. Areas Commun., vol. 18, pp. 2665-2683, Dec. 2000.
-
(2000)
IEEE J. Select. Areas Commun.
, vol.18
, pp. 2665-2683
-
-
-
8
-
-
0011093561
-
A family of ASIC devices for next-generation distributed packet switches with QoS support for IP and ATM
-
Stanford, CA, Aug.
-
F.M. Chiussi et al., "A family of ASIC devices for next-generation distributed packet switches with QoS support for IP and ATM," in Proc. Hot Interconnects 9, Stanford, CA, Aug. 2001.
-
(2001)
Proc. Hot Interconnects
, vol.9
-
-
Chiussi, F.M.1
-
9
-
-
0030259608
-
Hierarchical packet fair queueing algorithms
-
Aug.
-
J.C.R. Bennett and H. Zhang, "Hierarchical packet fair queueing algorithms," in Proc. ACM SIGCOMM'96, Aug. 1996, pp. 143-156.
-
(1996)
Proc. ACM SIGCOMM'96
, pp. 143-156
-
-
Bennett, J.C.R.1
Zhang, H.2
-
10
-
-
0031337497
-
Low-cost scalable switching solutions for broadband networking: The ATLANTA architecture and chipset
-
Dec.
-
F.M. Chiussi, J.G. Kneuer, and V.P. Kumar, "Low-cost scalable switching solutions for broadband networking: The ATLANTA architecture and chipset," IEEE Commun. Mag., vol. 35, pp. 44-53, Dec. 1997.
-
(1997)
IEEE Commun. Mag.
, vol.35
, pp. 44-53
-
-
Chiussi, F.M.1
Kneuer, J.G.2
Kumar, V.P.3
-
11
-
-
0031674630
-
Traffic management for an ATM switch with per-VC queueing: Concept and implementation
-
Jan.
-
U. Briem, E. Wallmeier, C. Beck, and F. Matthiesen, "Traffic management for an ATM switch with per-VC queueing: Concept and implementation," IEEE Commun. Mag., vol. 36, pp. 88-93, Jan. 1998.
-
(1998)
IEEE Commun. Mag.
, vol.36
, pp. 88-93
-
-
Briem, U.1
Wallmeier, E.2
Beck, C.3
Matthiesen, F.4
-
12
-
-
0029756982
-
Backpressure in shared-memory-based ATM switches under multiplexed bursty sources
-
Mar.
-
F.M. Chiussi, Y. Xia, and V.P. Kumar, "Backpressure in shared-memory-based ATM switches under multiplexed bursty sources," in Proc. IEEE INFOCOM '96, Mar. 1996, pp. 830-843.
-
(1996)
Proc. IEEE INFOCOM '96
, pp. 830-843
-
-
Chiussi, F.M.1
Xia, Y.2
Kumar, V.P.3
-
13
-
-
0031168627
-
Multicast scheduling for input-queued switches
-
June
-
B. Prabhakar, N. McKeown, and R. Ahuja, "Multicast scheduling for input-queued switches," IEEE J. Select. Areas Commun., vol. 15, pp. 855-866, June 1997.
-
(1997)
IEEE J. Select. Areas Commun.
, vol.15
, pp. 855-866
-
-
Prabhakar, B.1
McKeown, N.2
Ahuja, R.3
-
14
-
-
0003326409
-
A fast switched backplane for a gigabit switched router
-
Dec.
-
N. McKeown, "A fast switched backplane for a gigabit switched router," Bus. Commun. Rev., vol. 27, Dec. 1997.
-
(1997)
Bus. Commun. Rev.
, vol.27
-
-
McKeown, N.1
-
16
-
-
0002346271
-
An architecture for differentiated service
-
IETF
-
S. Blake et al., "An architecture for differentiated service," IETF, RFC 2475, 1998.
-
(1998)
RFC
, vol.2475
-
-
Blake, S.1
-
18
-
-
0023704955
-
High performance multiqueue buffers for VLSI communication switches
-
June
-
Y. Tamir and G. Frazier, "High performance multiqueue buffers for VLSI communication switches," in Proc. 15th Annual Symp. Computer Architectures, June 1988, pp. 343-354.
-
(1988)
Proc. 15th Annual Symp. Computer Architectures
, pp. 343-354
-
-
Tamir, Y.1
Frazier, G.2
-
19
-
-
0031336023
-
A general methodology for designing efficient traffic scheduling and shaping algorithms
-
Apr.
-
D. Stiliadis and A. Varma, "A general methodology for designing efficient traffic scheduling and shaping algorithms," in Proc. IEEE INFOCOM'97, Apr. 1997, pp. 326-335.
-
(1997)
Proc. IEEE INFOCOM'97
, pp. 326-335
-
-
Stiliadis, D.1
Varma, A.2
-
21
-
-
0027612043
-
A generalized processor sharing approach to flow control in integrated services networks: The single-node case
-
June
-
A.K. Parekh and R.G. Gallager, "A generalized processor sharing approach to flow control in integrated services networks: The single-node case," IEEE/ACM Trans. Networking, pp. 344-357, June 1993.
-
(1993)
IEEE/ACM Trans. Networking
, pp. 344-357
-
-
Parekh, A.K.1
Gallager, R.G.2
-
22
-
-
0028599989
-
A self-clocked fair queueing scheme for broadband applications
-
Apr.
-
S.J. Golestani, "A self-clocked fair queueing scheme for broadband applications," in Proc. IEEE INFOCOM'94, vol. 2, Apr. 1994, pp. 636-646.
-
(1994)
Proc. IEEE INFOCOM'94
, vol.2
, pp. 636-646
-
-
Golestani, S.J.1
-
23
-
-
0029736365
-
Latency-rate servers: A general model for analysis of traffic scheduling algorithms
-
Mar.
-
D. Stiliadis and A. Varma, "Latency-rate servers: A general model for analysis of traffic scheduling algorithms," in Proc. IEEE INFOCOM '96, Mar. 1996, pp. 111-119.
-
(1996)
Proc. IEEE INFOCOM '96
, pp. 111-119
-
-
Stiliadis, D.1
Varma, A.2
-
24
-
-
0026243589
-
Weighted Round-Robin cell multiplexing in a general-purpose ATM switch chip
-
Oct.
-
M. Katevenis, S. Sidiropoulos, and C. Courcoubetis, "Weighted Round-Robin cell multiplexing in a general-purpose ATM switch chip," IEEE J. Select. Areas Commun., vol. 9, pp. 1265-1279, Oct. 1991.
-
(1991)
IEEE J. Select. Areas Commun.
, vol.9
, pp. 1265-1279
-
-
Katevenis, M.1
Sidiropoulos, S.2
Courcoubetis, C.3
-
25
-
-
0003210037
-
Advances in implementing fair queueing schedulers in broadband networks
-
June
-
F.M. Chiussi and A. Francini, "Advances in implementing fair queueing schedulers in broadband networks," in Proc. IEEE ICC'99, June 1999.
-
(1999)
Proc. IEEE ICC'99
-
-
Chiussi, F.M.1
Francini, A.2
-
26
-
-
84864748175
-
Enhanced weighted round robin schedulers for bandwidth guarantees in packet networks
-
Rome, Italy, Jan.
-
A. Francini, F.M. Chiussi, R.T. Clancy, K.D. Drucker, and N.E. Idirene, "Enhanced weighted round robin schedulers for bandwidth guarantees in packet networks," in Proc. QoS-IP 2001, Rome, Italy, Jan. 2001, pp. 205-221.
-
(2001)
Proc. QoS-IP 2001
, pp. 205-221
-
-
Francini, A.1
Chiussi, F.M.2
Clancy, R.T.3
Drucker, K.D.4
Idirene, N.E.5
-
27
-
-
0034482218
-
Feedback control in a distributed scheduling architecture
-
San Francisco, CA, Nov.
-
F.M. Chiussi, A. Francini, D.A. Khotimsky, and S. Krishnan, "Feed-back control in a distributed scheduling architecture," in Proc. IEEE GLOBECOM 2000, High-Speed Networks Symp., San Francisco, CA, Nov. 2000.
-
(2000)
Proc. IEEE GLOBECOM 2000, High-Speed Networks Symp.
-
-
Chiussi, F.M.1
Francini, A.2
Khotimsky, D.A.3
Krishnan, S.4
-
28
-
-
84949983526
-
Minimum-latency dual-leaky-bucket shapers for packet multiplexers: Theory and implementation
-
Pittsburgh, PA, June
-
A. Francini and F.M. Chiussi, "Minimum-latency dual-leaky-bucket shapers for packet multiplexers: Theory and implementation," in Proc. IWQoS 2000, Pittsburgh, PA, June 2000, pp. 19-28.
-
(2000)
Proc. IWQoS 2000
, pp. 19-28
-
-
Francini, A.1
Chiussi, F.M.2
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