First- and second-level packaging for the IBM eServer z900

IBM Journal of Research and Development

Volumn 46, Issue 4-5, 2002, Pages 397-420

  Harrer, Hubert ^a   Pross, Harald ^a   Winkel, Thomas Michael ^a   Becker, Wiren D ^b   Stoller, Herb I ^c   Yamamoto, Masakazu ^d   Abe, Shinji ^d   Chamberlin, Bruce J ^c   Katopis, George A ^b  

^a IBM   (Germany)

^b IBM   (United States)

^c IBM MICROELECTRONICS   (United States)

^d HITACHI LTD   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; COSTS; FREQUENCIES; PROGRAM PROCESSORS; RELIABILITY; SERVERS; THIN FILMS;

MULTICHIP MODULE (MCM);

CMOS INTEGRATED CIRCUITS;

EID: 0036663769     PISSN: 00188646     EISSN: None     Source Type: Journal    
DOI: 10.1147/rd.464.0397     Document Type: Article

References (13)

1. G. Katopis, W.D. Becker, T.R. Mazzawey, H.H. Smith, C.K. Vakirtzis, S.A. Kuppinger, B. Singh, P.C. Lin, J. Bartells, Jr., G.V. Kihlmire, P.N. Venkatachalam, H.I. Stoller, and J.L. Frankel, "MCM Technology and Design for the S/390 G5 System," IBM J. Res. & Dev. 43, No. 5/6, 621-650 (September/November 1999).
2. G.A. Katopis and W.D. Becker, "S/390 Cost Performance Considerations for MCM Packaging Choices," IEEE Trans. Components, Packaging, Manuf. Technol., Part B: Adv. Packaging 21, No. 3, 286-297 (August 1998).
3. A. Charlesworth, "The Sun Fireplane System Interconnect," presented at the IEEE Supercomputing 2001 Workshop, Denver, November 2001.
4. E. Cordero, F. Ferriaolo, M. Floyd, K. Grower, and B. McCredie, "A Synchronous Wave-Pipeline Interface for POWER4," presented at the IEEE Computer Society HOT CHIPS Workshop, Stanford University, August 15-17, 1999.
5. M.F. McAllister, H. Harrer, and J. Chen, "Measurements of Signal Transmissions Using a Source Synchronous Wave-Pipeline Interface Across Multiple Interface Structures," presented at the Fourth Workshop on Signal Propagation of Interconnects, Magdeburg, Germany, May 2000.
6. J.M. Hoke, P.W. Bond, T. Lo, F.S. Pidala, and G. Steinbrueck, "Self-Timed Interface for S/390 I/O Subsystem Interconnection," IBM J. Res. & Dev. 43, No. 5/6, 829-846 (September/November 1999).
7. H. Harrer, D. Kaller, T.W. Winkel, and E. Klink, "Performance Comparison and Coupling Impact of Different Thin Film Structures," VDE/VDI Proceedings of the Mikroelektronik 97, Munich, March 1997, pp. 333-338.
8. H. Stoller, S. Ray, E. Perfecto, and T. Wassik, "Evolution of Engineering Change (EC) and Repair Technology in High Performance Multichip Modules at IBM," Proceedings of the 48th IEEE Conference on Electronic Components and Technology, Seattle, May 1998, pp. 916-921.
9. R.R. Tummala and E.J. Rymaszewski, Eds., Microelectronics Packaging Handbook, Van Nostrand Reinhold, New York, 1989.
10. T.W. Winkel, E. Klink, R. Frech, H. Virag, S. Böhringer, B. Chamberlin, D. Becker, and W.M. Ma, "Method and Structure for Reducing Power Noise," Patent No. DE8-1999-0040, IBM Boeblingen, March 1999.
11. B. Garben and M.F. McAllister, "Novel Methodology for Mid-Frequency Delta-I Noise Analysis of Complex Computer System Boards and Verification by Measurements," Proceedings of the 9th IEEE Topical Meeting on Electrical Performance of Electronic Packaging, Scottsdale, AZ, 2000, pp. 69-72.
12. Sigrity, Inc., SPEED 97; http://www.sigrity.com.
13. H.H. Smith and G.A. Katopis, "Multireflection Algorithm for Timed Statistical Coupled Noise Checking," IEEE Trans. Components, Packaging & Manuf. Techn. 19, 503-511 (August 1996).