Current dynamics-based macro-model for power simulation in a complex VLIW DSP processor

IEE Proceedings: Computers and Digital Techniques

Volumn 149, Issue 4, 2002, Pages 173-187

  Muresan, R ^a   Gebotys, C ^a  

^a UNIVERSITY OF WATERLOO   (Canada)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; COMPUTER SOFTWARE; CRYPTOGRAPHY; EMBEDDED SYSTEMS; MATHEMATICAL MODELS; VLSI CIRCUITS;

CURRENT DYNAMICS; MACRO-MODELS;

PROGRAM PROCESSORS;

EID: 0036631151     PISSN: 13502387     EISSN: None     Source Type: Journal    
DOI: 10.1049/ip-cdt:20020449     Document Type: Conference Paper

References (19)

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4. Function-level power estimation methodology for microprocessors
5. Statistically based prediction of power dissipation for complex embedded DSP processors
6. Power exploration for embedded VLIW architectures
7. Cycle-accurate simulation of energy consumption in embedded systems
8. Design of secure encryption in DSP embedded processors
9. Differential power analysis
10. Current consumption dynamics at instruction and program level for a VLIW DSP processor
11. Dynamic power simulation model for VLIW DSP processor VLSI cores with secure applications