SCOPUS 정보 검색 플랫폼

IEEE Journal of Solid-State Circuits

Volumn 37, Issue 6, 2002, Pages 684-693

A CMOS RF power amplifier with parallel amplification for efficient power control

(3) Shirvani, Alireza a,b,c Su, David K a,d Wooley, Bruce A a,b

a IEEE (United States)

b Stanford University (United States)

c Tavanza Inc (United States)

d Atheros Communications (United States)

Author keywords

Class F; CMOS radio frequency; Parallel architecture; Power amplifier; Power combining; Power control; Transmission line

Indexed keywords

CLASS F AMPLIFIERS; MOS SHORTING SWITCHES; PARALLEL AMPLIFIER ARCHITECTURE; POWER ADDED EFFICIENCY; POWER COMBINATION NETWORK;

AMPLIFICATION; COMPUTER SIMULATION; DIGITAL TO ANALOG CONVERSION; ELECTRIC POWER SUPPLIES TO APPARATUS; ELECTRIC SWITCHES; MOSFET DEVICES; POWER AMPLIFIERS; POWER CONTROL; RADIO FREQUENCY AMPLIFIERS; TRANSMISSION LINE THEORY;

CMOS INTEGRATED CIRCUITS;

EID: 0036612236 PISSN: 00189200 EISSN: None Source Type: Journal
DOI: 10.1109/JSSC.2002.1004572 Document Type: Article

Times cited : (102)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.