SCOPUS 정보 검색 플랫폼

Volumn 19, Issue 3, 2002, Pages 46-55

IP for embedded diagnosis

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; COMPARATOR CIRCUITS; COMPUTER AIDED SOFTWARE ENGINEERING; DESIGN FOR TESTABILITY; FAILURE ANALYSIS; FLIP FLOP CIRCUITS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; INTELLECTUAL PROPERTY; MICROPROCESSOR CHIPS; SEMICONDUCTOR DEVICES; SIGNAL GENERATORS;

BINARY SEARCH ALGORITHM; EMBEDDED MEMORY; FAULT DIAGNOSIS; RANDOM LOGIC; SILICON ON CHIP DEVICES;

BUILT-IN SELF TEST;

EID: 0036575129 PISSN: 07407475 EISSN: None Source Type: Journal
DOI: None Document Type: Article

Times cited : (10)

References (7)

1
- 0030285877
- Testing systems on a chip
- Nov.
- (1996) IEEE Spectrum , vol.33 , Issue.11 , pp. 42-47
- Chandramouli, R.¹ Pateras, S.²

2
- 0030384599
- Built-in self-test (BIST) in the era of deep sub-micron technology
- IEEE Press, Piscataway, N.J.
- (1996) Proc. Northcon 96 , pp. 312-315
- Koenemann, B.¹ Pateras, S.²

3
- 0003731578
- Kluwer Academic, Norwell, Mass
- (2000) Design for At-Speed Test, Diagnosis and Measurement
- Nadeau-Dostie, B.¹

4
- 0003784677
- John Wiley & Sons, New York
- (1991) Testing Semiconductor Memories: Theory and Practice
- Van De Goor, A.J.¹

5
- 0009530785
- IEEE, Piscataway, N.J.
- (1993) IEEE Std. 1149.1a-1993, Standard Test Access Port and Boundary Scan Architecture

6
- 0003972145
- John Wiley & Sons, New York
- (1988) Built-In Test for VLSI: Pseudorandom Techniques
- Bardell, P.H.¹ Savir, J.² McAnney, W.H.³

7
- 0034484415
- Bridging the gap between embedded test and ATE
- IEEE Press, Piscataway, N.J.
- Proc. Int'l Test Conf. (ITC 00) , pp. 55-63
- Bell, M.¹

* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.