SCOPUS 정보 검색 플랫폼

IEEE Design and Test of Computers

Volumn 19, Issue 2, 2002, Pages 50-58

Resizing rules for MOS analog-design reuse

(3) Galup Montoro, Carlos a Schneider, Márcio Cherem a Coitinho, Rafael Matos a

a FEDERAL UNIVERSITY OF SANTA CATARINA (Brazil)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); CAPACITANCE; COMPUTER SIMULATION; ELECTRIC CURRENT CONTROL; ELECTRIC POWER SUPPLIES TO APPARATUS; EQUIVALENT CIRCUITS; INTEGRATED CIRCUIT LAYOUT; TRANSCONDUCTANCE;

ANALOG CIRCUITS; COMMON SOURCE AMPLIFIER; RESIZING RULES; VOLTAGE AMPLIFIER;

MOSFET DEVICES;

EID: 0036495964 PISSN: 07407475 EISSN: None Source Type: Journal
DOI: 10.1109/54.990442 Document Type: Article

Times cited : (21)

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* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.