Some measurement results for frequency-dependent inductance of IC interconnects on a lossy silicon substrate

IEEE Electron Device Letters

Volumn 23, Issue 2, 2002, Pages 103-104

  De Roest, D ^b   Ymeri, H ^c   Vandenberghe, S ^c   Stucchi, M ^b   Schreurs, Dominique ^a,c   Maex, K ^b,c   Nauwelaers, Bart ^a,c  

^a IEEE

^b IMEC   (Belgium)

^c UNIVERSITY OF LEUVEN   (Belgium)

Author keywords

IC interconnect; Inductance; Lossy silicon substrate; Multiline calibration; S parameter

Indexed keywords

ELECTRIC IMPEDANCE; ELECTRIC NETWORK ANALYSIS; ELECTRIC VARIABLES MEASUREMENT; FREQUENCIES; INDUCTANCE; INTEGRATED CIRCUIT LAYOUT; MATHEMATICAL MODELS; MICROSTRIP LINES; SCATTERING PARAMETERS; SEMICONDUCTING SILICON; SEMICONDUCTOR DEVICE STRUCTURES; SUBSTRATES;

CLOSED FORM APPROXIMATION; FREQUENCY DEPENDENT INDUCTANCE; INTEGRATED CIRCUIT INTERCONNECTS; LOSSY SILICON SUBSTRATE; MULTILINE CALIBRATION; SHORT-OPEN-LOAD-THROUGH CALIBRATION; THROUGH-REFLECT-LINE CALIBRATION; VECTOR NETWORK ANALYZER;

INTEGRATED CIRCUITS;

EID: 0036477447     PISSN: 07413106     EISSN: None     Source Type: Journal    
DOI: 10.1109/55.981320     Document Type: Article

References (7)

1. High-speed signal propagation on lossy transmission lines
2. Distributed inductance and resistance per unit length formulas for ULSI interconnects on silicon substrates
3. A multiline method of network analyzer calibration
4. S-parameter-based IC interconnect transmission line characterization
5. Modeling the substrate effect in interconnect line characteristics of high-speed VLSI circuits
6. Highly accurate closed-form approximation for frequency-dependent resistance and inductance of IC interconnects
7. CAD-oriented equivalent circuit modeling of on-chip interconnects on lossy silicon substrate