Impact of technology parameters on inverter delay of UTB-SOI CMOS

IEEE International SOI Conference

Volumn , Issue , 2002, Pages 176-178

  Schulz, Thomas ^a   Pacha, Christian ^a   Risch, Lothar ^a  

^a INFINEON TECHNOLOGIES AG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; ELECTRIC INVERTERS; MOSFET DEVICES; PARAMETER ESTIMATION; SEMICONDUCTING SILICON; SEMICONDUCTOR DOPING; SILICON ON INSULATOR TECHNOLOGY;

SILICON FILMS;

CMOS INTEGRATED CIRCUITS;

EID: 0036458634     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/soi.2002.1044466     Document Type: Conference Paper

References (4)

1. Y.-K. Choi, et al., "Ultrathin-Body SOI MOSFET for Deep-Sub-Tenth Micron Era", IEEE Electron Device Letters, May 2000, pp. 254-255.
2. Silvaco Intern., Atlas User's Manual, Santa Clara, Oct. 1996.
3. R. Lin, et al., "An Adjustable Work Function Using Mo Gate for CMOS Devices", IEEE Electron Device Letters, January 2002, pp. 49-51.
4. H. Zhong, et al., "Properties of Ru-Ta Alloys as Gate Electrodes For NMOS and PMOS Silicon Devices", IEDM Tech. Dig., Dec. 2001, pp. 467-470.