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Volumn , Issue , 2002, Pages 59-62
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A 40 Gb/s integrated differential PIN+TIA with DC offset control using InP SHBT technology
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Author keywords
[No Author keywords available]
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Indexed keywords
BANDWIDTH;
CAPACITORS;
COMPUTER SIMULATION;
ELECTRIC IMPEDANCE;
GAIN CONTROL;
JITTER;
SEMICONDUCTING INDIUM PHOSPHIDE;
OFFSET CONTROL;
HETEROJUNCTION BIPOLAR TRANSISTORS;
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EID: 0036438176
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: None Document Type: Conference Paper |
Times cited : (15)
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References (3)
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