Improving the efficiency of circuit-to-BDD conversion by gate and input ordering

Proceedings - IEEE International Conference on Computer Design: VLSI in Computers and Processors

Volumn , Issue , 2002, Pages 64-69

  Aloul, Fadi A ^a   Markov, Igor L ^a   Sakallah, Karem A ^a  

^a The Department of Civil and Environmental Engineering   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; COMPUTATIONAL COMPLEXITY; GRAPH THEORY; HEURISTIC METHODS; INTEGRATED CIRCUIT TESTING; LOGIC CIRCUITS; LOGIC DESIGN; LOGIC GATES; RECURSIVE FUNCTIONS;

BINARY DECISION DIAGRAM; BOOLEAN CIRCUIT; CONJUNCTIVE NORMAL FORM; DIGITAL LOGIC;

INTEGRATED CIRCUIT LAYOUT;

EID: 0036398342     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)

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