A single-chip MPEG-2 codec based on customizable media microprocessor

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2002, Pages 163-166

  Ishiwata, Shunichi ^a   Yamakage, Tomoo ^a   Tsuboi, Yoshiro ^a   Shimazawa, Takayoshi ^a   Kitazawa, Tomoko ^a   Michinaka, Shuji ^a   Yahagi, Kunihiko ^a   Takeda, Hideki ^a   Oue, Akihiro ^a   Kodama, Tomoya ^a   Matsumoto, Nobu ^a   Kamei, Takayuki ^a   Miyamori, Takashi ^a   Ootomo, Goichi ^a   Matsui, Masataka ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER HARDWARE; COMPUTER SOFTWARE; DIGITAL SIGNAL PROCESSING; IMAGE CODING; MOTION PICTURES; REDUCED INSTRUCTION SET COMPUTING; VERY LONG INSTRUCTION WORD ARCHITECTURE;

MEDIA MICROPROCESSORS;

MICROPROCESSOR CHIPS;

EID: 0036045368     PISSN: 08865930     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. A 4GOPS 3Way-VLIW image recognition processor based on a configurable media-processor
2. A 99mm2, 0.7-W single-chip MPEG2 422P@ML video, audio, system encoder with a 64-Mbit embedded DRAM for portable 422P@HL encoder system
3. A 1.2W single-chip MPEG2 MP@ML video encoder LSI including wide search range motion estimator and 81 MOPS controller
4. A 250MHz single-chip multiprocessor for A/V signal processing