Satisfiability models and algorithms for circuit delay computation

ACM Transactions on Design Automation of Electronic Systems

Volumn 7, Issue 1, 2002, Pages 137-158

  Guerra E Silva, Luís ^a   Marques Silva, João ^a   Silveira, L Miguel ^a   Sakallah, Karem A ^b  

^a INSTITUTO SUPERIOR TÉCNICO   (Portugal)

^b UNIVERSITY OF MICHIGAN   (United States)

Author keywords

Boolean satisfiability; Circuit delay computation; Delay modeling; False path; Timing analysis

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; COMBINATORIAL CIRCUITS; COMPUTATIONAL COMPLEXITY; DELAY CIRCUITS; SEQUENTIAL CIRCUITS;

DELAY COMPUTATIONS;

DIGITAL CIRCUITS;

EID: 0036354804     PISSN: 10844309     EISSN: None     Source Type: Journal    
DOI: 10.1145/504914.504920     Document Type: Article

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