A 2.4-GHz/5-GHz CMOS low noise amplifier with high-resistivity ELTRAN® SOI-Epi™ wafers

IEEE MTT-S International Microwave Symposium Digest

Volumn 3, Issue , 2002, Pages 1419-1422

  Kodate, Junichi ^a   Ugajin, Mamoru ^a   Tsukahara, Tsuneo ^a   Douseki, Takakuni ^a   Sato, Nobuhiko ^a   Okabe, Takehito ^a   Ohmi, Kazuaki ^a   Yonehara, Takao ^a  

^a NTT CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; ELECTRIC INDUCTORS; ELECTRIC RESISTANCE; FREQUENCIES; INTEGRATED CIRCUIT LAYOUT; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; SPURIOUS SIGNAL NOISE; SUBSTRATES;

EPITAXIAL LAYER TRANSFER; LOW NOISE AMPLIFIERS; NOISE FIGURE; RADIO FREQUENCY INTEGRATED CIRCUITS; SPIRAL INDUCTOR; SUBSTRATE RESISTIVITY;

AMPLIFIERS (ELECTRONIC);

EID: 0036316381     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)

1. 1.9GHz/5.8GHz-band on-chip matching Si-MMIC low noise amplifiers fabricated on high resistive Si substrate
2. The effects of substrate resistivity on RF component and circuit performance
3. Linearity and low-noise performance of SOIMOSFETs for RF applications
4. A 1-V, 1.9-GHz CDMA, CMOS on SOI, low noise amplifier
5. High resistive ELTRAN SOI-Epi wafers for RF application
6. Epitaxial layer transfer by bond and etchback of porous Si