A 1 GHz linearized CMOS track-and-hold circuit

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 5, Issue , 2002, Pages

  Jakonis, Darius ^a   Svensson, Christer ^a  

^a LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

ANALOG TO DIGITAL CONVERSION; CMOS INTEGRATED CIRCUITS; ELECTRIC CONDUCTANCE; HARMONIC DISTORTION; INTEGRATED CIRCUIT MANUFACTURE; LINEARIZATION; MOS DEVICES; SIGNAL TO NOISE RATIO; TIMING CIRCUITS; WAVEFORM ANALYSIS;

CHANNEL CHARGE INJECTION; CHANNEL CONDUCTANCE; GATE SOURCE VOLTAGE; MOS SAMPLING SWITCH; SIGNAL TO DISTORTION RATIO; TRACK AND HOLD CIRCUIT;

ELECTRIC SWITCHES;

EID: 0036295062     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (9)

1. High-speed data converters for communication systems
2. Analog-to-digital converter survey and analysis
3. Jitter analysis of high-speed sampling systems
4. A high-speed CMOS track/hold circuit
5. A high-speed sample-and-hold technique using a Miller hold capacitance
6. Distortion in sampling