Multirate cascaded continuous time ΣΔ modulators

Proceedings - IEEE International Symposium on Circuits and Systems

Volumn 4, Issue , 2002, Pages

  Ortmanns, Maurits ^a   Samid, Lourans ^a   Manoli, Yiannos ^a   Gerfers, Friedel ^a  

^a UNIVERSITY OF FREIBURG   (Germany)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER SIMULATION; JITTER; LINEAR INTEGRATED CIRCUITS; SENSITIVITY ANALYSIS; TIME DOMAIN ANALYSIS;

CLOCK JITTER; CONTINUOUS TIME MODULATORS;

DELTA SIGMA MODULATION;

EID: 0036292823     PISSN: 02714310     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. A design strategy for low-voltage low-power continuous-time ΣΔ A/D converters
2. On the synthesis of cascaded continuous-time ΣΔ modulators
3. Optimal parameters for delta-sigma modulator topologies
4. Successful design of cascaded continuous-time ΣΔ modulators
5. Jitter insensitive feedback DAC for continuous-time ΣΔ modulators
6. Multirate-cascade sigma-delta (MC-SD) modulators
7. Excess loop delay in continuous-time ΔΣ modulators