Direct bump-on-copper process for flip chip technologies

Proceedings - Electronic Components and Technology Conference

Volumn , Issue , 2002, Pages 704-710

  Ling, Jarnin ^a   Sanchez, Joseph ^a   Moyer, Ralph ^b   Bachman, Mark ^b   Stepniak, Dave ^a   Elenius, Pete ^a  

^a Kuhcke and Soffa   (United States)

^b AGERE SYSTEMS   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AUTOCLAVES; COPPER; METALLURGY; SILICON WAFERS; SOLDERING; TITANIUM;

THERMAL SHOCK (TS); UNDER BUMP METALLURGY (UBM);

FLIP CHIP DEVICES;

EID: 0036287371     PISSN: 05695503     EISSN: None     Source Type: Journal    
DOI: 10.1109/ECTC.2002.1008175     Document Type: Article

References (19)

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5. Flip chip ball grid array packaging for RFICs
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7. Impact of under-bump-matellurgy on flip chip reliability
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9. 300 mm wafer stepper for bump and wafer level chip scale packaging (CSP) applications
10. Flex-on-cap alignment technology for 300mm wafer bumping
11. Using wet chemistry for etching under. Bump metal
12. Investigation of under bump metallization systems for flip chip assemblies
13. Conversion of the under bump metallurgy into intermetallics: The impact on flip chip reliability
14. Estimating flip chip reliability: Interactive, temperature-dependent failure mechanisms involving the under bump metallurgy