A new punch-through IGBT having a new n-buffer layer

IEEE Transactions on Industry Applications

Volumn 38, Issue 1, 2002, Pages 168-174

  Iwamoto, Hideo ^b   Haruguchi, Hideki ^b   Tomomatsu, Yoshifumi ^c   Donlon, John F ^a,d   Motto, Eric R ^a,d  

^a IEEE

^b MITSUBISHI ELECTRIC CORPORATION   (Japan)

^c Qual Eval and Chem Anal Dept   (Japan)

^d POWEREX INC   (United States)

Author keywords

Insulated gate bipolar transistor; Power semiconductor

Indexed keywords

BUFFER CIRCUITS; ELECTRIC POTENTIAL; POSITIVE TEMPERATURE COEFFICIENT; SEMICONDUCTING SILICON; SHORT CIRCUIT CURRENTS;

POWER SEMICONDUCTORS;

INSULATED GATE BIPOLAR TRANSISTORS;

EID: 0036255156     PISSN: 00939994     EISSN: None     Source Type: Journal    
DOI: 10.1109/28.980372     Document Type: Conference Paper

References (5)

1. Modeling the turn-off characteristics of bipolar MOS transistor
2. A relation between dynamic saturation characteristics and tail current of nonpunchthrough IGBT
3. Examination of punch through IGBT for high voltage and high current applications
4. Buried recombination layers with enhanced N-type conductivity for silicon power devices