Dummy-feature placement for chemical-mechanical polishing uniformity in a shallow-trench isolation process

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 21, Issue 1, 2002, Pages 63-71

  Tian, Ruiqi ^b,c   Tang, Xiaoping ^b   Wong, Martin D F ^a,b  

^a IEEE   (United States)

^b University of Texas at Austin   (United States)

^c MOTOROLA INC   (United States)

Author keywords

Chemical mechanical polishing; Design for manufacturability; Dummy feature; Planarity; Shallow trench isolation

Indexed keywords

SHALLOW TRENCH ISOLATION (STI);

CHEMICAL MECHANICAL POLISHING; COMPUTATIONAL METHODS; INTEGRATED CIRCUIT LAYOUT; ITERATIVE METHODS; NONLINEAR PROGRAMMING; PROBLEM SOLVING;

COMPUTER AIDED DESIGN;

EID: 0036183154     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.974138     Document Type: Article

References (13)

1. Practical iterated fill synthesis for CMP uniformity
2. Filling algorithms and analyzes for layout density control
3. An integrated characterization and modeling methodology for CMP dielectric planarization
4. The theory and design of plate glass polishing machines
5. A closed-form analytical model for ILD thickness variation in CMP processes
6. Model-based dummy feature placement for oxide chemical-mechanical polishing manufacturability
7. A mathematical model of pattern dependence in Cu CMP process