The 16 kB single-cycle read access cache on a next-generation 64B itanium microprocessor

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 2002, Pages 110-111+451+99

  Bradley, David ^a   Mahoney, Patrick ^a   Stackhouse, Blaine ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; CACHE MEMORY; DECODING; FIELD EFFECT TRANSISTORS; RANDOM ACCESS STORAGE;

HIGH BANDWIDTH MEMORIES;

MICROPROCESSOR CHIPS;

EID: 0036117607     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (3)

1. A 1 GHz single-issue 64b PowerPC processor
2. rd generation 64b SPARC microprocessor
3. A high performance 180 nm generation logic technology