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Volumn 3, Issue , 2002, Pages 1409-1412

Integrated inductors in the chip-to-board interconnect layer fabricated using solderless electroplating bonding

Author keywords

[No Author keywords available]

Indexed keywords

BONDING; ELECTRONICS PACKAGING; ELECTROPLATING; FLIP CHIP DEVICES; INTEGRATED CIRCUIT LAYOUT; INTERCONNECTION NETWORKS; MULTICHIP MODULES; PRINTED CIRCUIT BOARDS; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES; SUBSTRATES; SURFACE MOUNT TECHNOLOGY;

EID: 0036063403     PISSN: 0149645X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper
Times cited : (10)

References (8)
  • 5
    • 0031197364 scopus 로고    scopus 로고
    • S parameter-based experimental modeling of high Q MCM inductor with exponential gradient learning algorithm
    • Aug.
    • (1997) IEEE Trans. CPMT B , vol.20 , Issue.3 , pp. 202-210
    • Zhao, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.