Macro-Modeling concepts for the chip electrical interface

Proceedings - Design Automation Conference

Volumn , Issue , 2002, Pages 391-394

  Amick, Brian W ^a   Gauthier, Claude R ^a   Liu, Dean ^a  

^a SUN MICROSYSTEMS   (United States)

Author keywords

Analog and I O power delivery; High speed microprocessor design; Inductance; VLSI power distribution

Indexed keywords

ANALOG CIRCUITS; ELECTRICAL INTERFACES;

DIGITAL CIRCUITS; ELECTRIC LOADS; ELECTRIC POWER DISTRIBUTION; ELECTRIC POWER SYSTEMS; MICROPROCESSOR CHIPS; RELIABILITY; SYSTEMS ANALYSIS; TRANSISTORS;

VLSI CIRCUITS;

EID: 0036059618     PISSN: 0738100X     EISSN: None     Source Type: Journal    
DOI: 10.1109/DAC.2002.1012656     Document Type: Article

References (7)

1. Power distribution system design methodology and capacitor selection for modern CMOS technology
2. Controlling capacitor parasitics for high frequency decoupling capacitors
3. Power supply noise analysis methodology for deep-submicron VLSI chip design
4. A 320 MHz, 1.5 mW @ 1.35-V CMOS PLL for microprocessor clock generation