Fast three-level logic minimization based on autosymmetry

Proceedings - Design Automation Conference

Volumn , Issue , 2002, Pages 425-430

  Bernasconi, Anna ^a   Ciriani, Valentina ^a   Luccio, Fabrizio ^a   Pagli, Linda ^a  

^a UNIVERSITY OF PISA   (Italy)

Author keywords

Autosymmetry; Synthesis; Three Level logic

Indexed keywords

ALGORITHMS; BENCHMARKING; BOOLEAN FUNCTIONS; DATA STRUCTURES;

LOGIC SYNTHESIS TECHNIQUES;

LOGIC CIRCUITS;

EID: 0036059573     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/513918.514027     Document Type: Conference Paper

References (11)

1. Realization of Boolean functions by disjunctions of products of linear forms
2. Logic minimization using exclusive OR gates
3. Two-level logic minimization: An overview
4. An optimization of AND-OR-EXOR three-level networks
5. AOXMIN-MV: A heuristic algorithm for AND-OR-XOR minimization
6. On a new Boolean function with applications
7. ESPRESSO-SIGNATURE: A new exact minimizer for logic functions