Optimization of AND-OR-EXOR three-level networks

Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Volumn , Issue , 1997, Pages 545-550

  Debnath, Debatosh ^a   Sasao, Tsutomu ^a  

^a KYUSHU INSTITUTE OF TECHNOLOGY   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BOOLEAN FUNCTIONS; COMPUTATIONAL COMPLEXITY; LOGIC CIRCUITS; LOGIC DESIGN; MINIMIZATION OF SWITCHING NETS;

SUM OF PRODUCTS (SOP) EXPRESSIONS; THREE LEVEL NETWORKS;

LOGIC GATES;

EID: 0030681134     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (18)