A simple 1-transistor capacitor-less memory cell for high performance embedded DRAMs

Proceedings of the Custom Integrated Circuits Conference

Volumn , Issue , 2002, Pages 99-102

  Fazan, Pierre C ^a,b   Okhonin, Serguei ^b   Nagoga, Mikhail ^b   Sallese, Jean Michel ^b  

^a Innovative Silicon Solutions   (Switzerland)

^b EPFL   (Switzerland)

Author keywords

[No Author keywords available]

Indexed keywords

BINARY SEQUENCES; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; CURRENT VOLTAGE CHARACTERISTICS; EMBEDDED SYSTEMS; IMPACT IONIZATION; SILICON ON INSULATOR TECHNOLOGY;

CAPACITOR-LESS MEMORY CELLS; MEMORY ARCHITECTURES;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 0036045982     PISSN: 08865930     EISSN: None     Source Type: Journal    
DOI: 10.1109/CICC.2002.1012775     Document Type: Article

References (10)

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8. A SOI capacitor-less IT-DRAM concept
9. A high speed clamped bit line current mode sense amplifier