1.2 W single-chip MPEG2 MP ML video encoder LSI including wide search range motion estimation and 81 MOPS controller

Digest of Technical Papers - IEEE International Solid-State Circuits Conference

Volumn , Issue , 1998, Pages 32-33

  Ogura, Eiji ^a   Takashima, Masatoshi ^a   Hiranaka, Daisuke ^a   Ishikawa, Toshiro ^a   Yanagita, Yukio ^a   Suzuki, Shuji ^a   Fukuda, Tokuya ^a   Ishii, Toshiyuki ^a  

^a SONY CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ADAPTIVE ALGORITHMS; APPLICATION SPECIFIC INTEGRATED CIRCUITS; CMOS INTEGRATED CIRCUITS; COMPUTER ARCHITECTURE; IMAGE CODING; LSI CIRCUITS; OPTIMIZATION; PIPELINE PROCESSING SYSTEMS; RANDOM ACCESS STORAGE; TELEVISION STANDARDS;

MOTION PICTURE EXPERTS GROUP (MPEG) STANDARDS;

VIDEO SIGNAL PROCESSING;

EID: 0031710310     PISSN: 01936530     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (1)