Wire bonding to advanced Copper-Low-K integrated circuits, the metal/dielectric stacks, and materials considerations

Proceedings of SPIE - The International Society for Optical Engineering

Volumn 4587, Issue , 2001, Pages 484-491

  Harman, George G ^a   Johnson, Christian E ^a  

^a NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

Author keywords

Bondability; Copper; Diffusion barriers; LoK; Polymer; Thin film; Wire bonding

Indexed keywords

BONDING; CRACK INITIATION; METALLIZING; PERMITTIVITY; RELIABILITY; STRESS ANALYSIS; THERMAL CONDUCTIVITY OF SOLIDS; THIN FILMS; WIRE;

DIFFUSION BARRIERS; WIRE BONDING;

ULSI CIRCUITS;

EID: 0035772277     PISSN: 0277786X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (11)

1. Tran, T. A., Yong, L., Williams, B., Chen, S., and Chen, A., Fine-Pitch Probing and Wirebonding and Reliability of Aluminum Capped Copper Bond Pads, Proc. HDI, April 25-28, 2000, De river, CO, pp. 390-395.
2. Mercado, L., Radke, R., Ruston, M., Tran, T., Williams, B., Yong, L., Chen, A., and Chen, S., Fine Pitch Probing and Wire Bonding and Reliability of Multi-Layer Copper Interconnect Structures, Proc. 2000 IMAPS Symposium, Boston MA, Sept. 20-22, 2000, pp. 727-732.
3. Harman, G.G., Wire Bonding in Microelectronics, Materials, Processes Reliability, and Yield, Second Edition, McGraw Hill (1997). See Chapter 10 for more references.
4. U.S. Patent 5,785,236, Cheung, R.W., and Lin, Ming-Ren, Advanced Copper Interconnect System That Is Compatible with Existing IC Wire Bonding Technology, issued July 28, 1998.
5. Hall, P.M., and Morabito, J.M., Diffusion Problems in Microelectronics Packaging, Thin Solid Films 53, pp. 175-182 (1978).
6. Inoue, T., Ando, S., et al., Stable Non-Cyanide Electroless Gold Plating Which Is Applicable to Manufacturing of Fine Pattern Printed Wiring Boards, Proc 45th ECTC, Las Vegas, NM, May 21-24, 1995, pp. 1059-1067 (Currently available through Englehard, CLAL).
7. Hall, P.M., Panousis, N.T., and Menzel, P.R., Strength of Gold-Plated Copper Leads on Thin Film Circuits Under Accelerated Aging, IEEE Trans. on Parts, Hybrids, and Packaging PHP-11, No. 3, September 1975, pp. 202-205.
8. Manepalli, R., Stepniak, F., Allen, S., and Kohl, P., Silver Metallization for Advanced Interconnects, IEEE Trans. on Adv Packaging, Vol-22, Feb. 1999, pp. 4-8.
9. Alers, G.B., Dornisch, D., et., al. Trade-off between reliability and post CMP defects during recrystallization anneal for copper damascene interconnects, Proc. 39th Annual IRPS, Orlando, FL, 2001, pp. 350-354.
10. Saran, M., Cox, R., Martin, C., et al., Elimination of Bond-pad Damage Through Structural Reinforcement of Intermetal Dielectrics, 36th Annual IRPS March 31-April 2, 1998, pp.225-231.
11. Ohtomo, Y., Multi-Gb/s CMOS LSI Design and Requirements for LSI Packages, Proc. Of the Fifth VLSI Packaging Workshop of Japan, Kyoto Japan, Dec. 4-6, 2000, pp.6-9.