A very high efficiency silicon bipolar transistor

Technical Digest-International Electron Devices Meeting

Volumn , Issue , 2001, Pages 883-886

  Carrara, Francesco ^a   Scuderi, Antonino ^b   Tontodonato, Giuseppina ^b   Palmisano, Giuseppe ^a  

^a UNIVERSITY OF CATANIA   (Italy)

^b STMICROELECTRONICS   (Italy)

Author keywords

[No Author keywords available]

Indexed keywords

BUILT-IN SELF TEST; ELECTRIC POWER SUPPLIES TO APPARATUS; INTEGRATED CIRCUIT LAYOUT; MOBILE TELECOMMUNICATION SYSTEMS; MOS CAPACITORS; NATURAL FREQUENCIES; POWER AMPLIFIERS; RESISTORS; SEMICONDUCTOR DOPING; TRANSMISSION ELECTRON MICROSCOPY; TRANSMITTERS;

POWER ADDED EFFICIENCY; SILICON BIPOLAR TECHNOLOGY;

BIPOLAR TRANSISTORS;

EID: 0035717523     PISSN: 01631918     EISSN: None     Source Type: Journal    
DOI: 10.1109/IEDM.2001.979654     Document Type: Article

References (9)

1. max implanted base Si bipolar technology
2. 12 ps implanted base silicon bipolar technology
3. Large signal RF behaviour of low supply voltage (<3.5 V) bipolar junction transistors
4. A monolithic transformer coupled 5-W silicon power amplifier with 59% PAE at 0.9 GHz
5. A monolithic 2.5 V, 1 W silicon bipolar amplifier with 55% PAE at 1.9 GHz
6. Class-F power amplifiers with maximally flat waveforms
7. Effects of matching on RF power amplifier efficiency and output power