Comprehensive study of substrate noise isolation for mixed-signal circuits

Technical Digest-International Electron Devices Meeting

Volumn , Issue , 2001, Pages 519-522

  To, K H ^a   Welch, P ^a   Bharatan, S ^a   Lehning, H ^a   Huynh, T L ^a   Thoma, R ^a   Monk, D ^a   Huang, W M ^a   Ilderem, V ^a  

^a MOTOROLA INC   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BROADBAND AMPLIFIERS; METALLIZING; MIXER CIRCUITS; SEMICONDUCTOR DEVICE MANUFACTURE; SEMICONDUCTOR DEVICE STRUCTURES; SEMICONDUCTOR JUNCTIONS; SIGNAL PROCESSING; SPECTRUM ANALYZERS; SPURIOUS SIGNAL NOISE; SUBSTRATES;

MIXED SIGNAL CIRCUITS; SUBSTRATE NOISE ISOLATION; WIDE BANDWIDTH AMPLIFIER;

CMOS INTEGRATED CIRCUITS;

EID: 0035717520     PISSN: 01631918     EISSN: None     Source Type: Journal    
DOI: 10.1109/IEDM.2001.979559     Document Type: Article

References (7)

1. A scalable substrate noise coupling model for design of mixed-signal IC's
2. Physical design guides for substrate noise reduction in CMOS digital circuits
3. Measuring and modeling the effects of substrate noise on the LNA for a CMOS GPS receiver
4. Substrate noise generation in complex digital systems: Efficient modeling and simulation methodology and experimental verification
5. A 0.18μm Si Ge:C RFBiCMOS technology for wireless and gigabit optical communication applications
6. Integration of high-Q inductors in a latch-up resistant CMOS technology
7. 3-D simulation and modeling of signal isolation in RF/IF circuits