A 3-D BiCMOS technology using selective epitaxial growth (SEG) and lateral solid phase epitaxy (LSPE)

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2001, Pages 729-732

  Kumar, Mahender ^a   Liu, Haitao ^a   Sin, Johnny K O ^a   Wan, Jun ^a   Wang, Kang L ^a  

^a HONG KONG UNIVERSITY OF SCIENCE AND TECHNOLOGY   (Hong Kong)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; BIPOLAR TRANSISTORS; EPITAXIAL GROWTH; INTEGRATED CIRCUIT MANUFACTURE; ION IMPLANTATION; SEMICONDUCTOR DEVICE STRUCTURES; SILICON ON INSULATOR TECHNOLOGY; SILICON WAFERS; SINGLE CRYSTALS; THRESHOLD VOLTAGE; ULSI CIRCUITS;

BICMOS TECHNOLOGY; LATERAL SOLID PHASE EPITAXY; SELECTIVE EPITAXIAL GROWTH;

CMOS INTEGRATED CIRCUITS;

EID: 0035714854     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. Novel 3-D structures
2. Three dimensional CMOS integrated circuits on large grain polysilicon films
3. Novel silicon epitaxy for advanced MOSFET devices
4. Solid phase epitaxy for low pressure chemical vapor deposition Si films induced by ion implantation
5. Enhanced growth mechanism in lateral solid-phase epitaxy of Si films simultaneous doped with P and Ge atoms