A general partition scheme for gate leakage current suitable for MOSFET compact models

Technical Digest - International Electron Devices Meeting

Volumn , Issue , 2001, Pages 293-296

  Shih, Wei Kai ^a   Rios, Rafael ^a   Packan, Paul ^a   Mistry, Kaizad ^a   Abbott, Tracy ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPROXIMATION THEORY; COMPUTER SIMULATION; LEAKAGE CURRENTS; MATHEMATICAL MODELS; MOSFET DEVICES;

DRAIN PARTITION; GATE LEAKAGE CURRENT; INVERSION CHARGE; SOURCE PARTITION;

GATES (TRANSISTOR);

EID: 0035714812     PISSN: 01631918     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (5)

1. BSIM4 gate leakage model including source-drain partition
2. Modeling gate and substrate currents due to conduction- and valence-band electron and hole tunneling
3. A charge-oriented model for MOS transistor capacitances
4. A 130nm genheration logic technology featuring 70nm transistors, dual Vt transistors and 6 layers of Cu interconnects