Solution space analysis of interconnects for Low Voltage Differential Signaling (LVDS) applications

IEEE Topical Meeting on Electrical Performance of Electronic Packaging

Volumn , Issue , 2001, Pages 327-330

  Ahn, Seungyoung ^a   Lu, Albert Chee W ^a   Fan, Wei ^a   Wai, Lai L ^a   Kim, Joungho ^a  

^a SINGAPORE INSTITUTE OF MANUFACTURING TECHNOLOGY   (Singapore)

Author keywords

[No Author keywords available]

Indexed keywords

CHARACTERIZATION; COMPUTER SIMULATION; DIFFERENTIAL EQUATIONS; FREQUENCY DOMAIN ANALYSIS; NUMERICAL ANALYSIS; THREE DIMENSIONAL;

LOW VOLTAGE DIFFERENTIAL SIGNALING APPLICATION; SOLUTION SPACE ANALYSIS; TIME DOMAIN REFLECTOMETRY; TIME DOMAIN TRANSIENT SIMULATION;

INTERCONNECTION NETWORKS;

EID: 0035699277     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. When are transmission-line effects important for on-chip interconnections?
2. Applications of a 3-D field solver for on-chip and package microstrip interconnection design
3. High-performance microprocessor design
4. Package-level interconnect design for optimum electrical performance
5. BusLVDS expands applications for low voltage differential signaling (LVDS)
6. Combined differential and common-mode scattering parameters: Theory and simulation
7. Understanding single-ended and mixed-mode S-parameter
8. High-speed VLSI interconnect modeling based on S-parameter measurements