Skipper: A microarchitecture for exploiting control-flow independence

Proceedings of the Annual International Symposium on Microarchitecture

Volumn , Issue , 2001, Pages 4-15

  Cher, Chen Yong ^a   Vijaykumar, T N ^a  

^a PURDUE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTER ARCHITECTURE; COMPUTER SIMULATION; DATA FLOW ANALYSIS;

MIROARCHITECTURE; SUPERSCALAR PROCESSORS;

PROGRAM PROCESSORS;

EID: 0035694352     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (23)

1. A dynamic multithreading processor
2. Integrated predicated and speculative execution in the impact epic architecture
3. The anatomy of the register file in a multiscalar processor
4. Reducing branch mispmdiction penalties via dynamic control independence detection
5. Confidence estimation for speculation control
6. The effect of speculatively updating branch history on branch prediction accuracy, revisited
7. Assigning confidence to conditional branch predictions
8. Dynamic hammock predication for non-predicated instruction set architectures
9. Instruction fetch mechanisms for multipath execution processors
10. Selective eager execution on the polypath architecture
11. Y-pipe: A conditional branching scheme without pipeline delays
12. Effective compiler support for predicated execution using the hyperblock
13. Dynamic speculation and synchronization of data dependences
14. A study of control independence in superscalar processors
15. Control independence in trace processors
16. Dynamic instruction reuse
17. Multiscalar processors
18. Reducing the performance impact of instruction cache misses by writing instructions into the reservation stations out-of-order
19. Task selection for a multiscalar processor
20. Threaded multiple path execution
21. A comparison of dynamic branch predictors that use two levels of branch history