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Volumn , Issue , 1998, Pages 278-285

Dynamic hammock predication for non-predicated instruction set architectures

Author keywords

[No Author keywords available]

Indexed keywords

ARCHITECTURE; PARALLEL ARCHITECTURES;

EID: 0007993303     PISSN: 1089795X     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/PACT.1998.727261     Document Type: Conference Paper
Times cited : (41)

References (24)
  • 3
    • 0029181273 scopus 로고
    • Using predicated execution to improve the performance of a dynamically scheduled machine with speculative execution
    • Limassol, Cyprus, June
    • P.-Y. Chang, E. Hao, Y. Patt, and P. Chang. Using Predicated Execution to Improve the Performance of a Dynamically Scheduled Machine with Speculative Execution. In Intl. Conf. on Parallel Arch. and Compilation Techniques, Limassol, Cyprus, June 1995.
    • (1995) Intl. Conf. on Parallel Arch. and Compilation Techniques
    • Chang, P.-Y.1    Hao, E.2    Patt, Y.3    Chang, P.4
  • 4
    • 0031271850 scopus 로고    scopus 로고
    • Circuit techniques in a 266-mhz mmx-enabled processor
    • Nov.
    • D. Draper et al. Circuit Techniques in a 266-MHz MMX-Enabled Processor. IEEE Journal of Solid-State Circuits, 32(11), Nov. 1997.
    • (1997) IEEE Journal of Solid-State Circuits , vol.32 , Issue.11
    • Draper, D.1
  • 9
    • 0004130813 scopus 로고    scopus 로고
    • Nov. University of Wisconsin-Madison
    • T. Heil and J. Smith. Selective Dual Path Execution, Nov. 1996. University of Wisconsin-Madison, http://www.ece.wisc.edu/ jes/papers/isca.sdpe.ps.
    • (1996) Selective Dual Path Execution
    • Heil, T.1    Smith, J.2
  • 18
    • 0024480706 scopus 로고
    • The cydra 5 departmental supercomputer
    • Jan.
    • R. Rau, D. Yen, W. Yen, and R. Towle. The Cydra 5 Departmental Supercomputer. IEEE Computer, 22(1):12-35, Jan. 1989.
    • (1989) IEEE Computer , vol.22 , Issue.1 , pp. 12-35
    • Rau, R.1    Yen, D.2    Yen, W.3    Towle, R.4
  • 20
    • 33749411593 scopus 로고
    • Facilitating superscalar processing via a combined static/dynamic register renaming scheme
    • San Jose, CA, Dec.
    • E. Sprangle and Y. Patt. Facilitating Superscalar Processing via a Combined Static/Dynamic Register Renaming Scheme. In 27th Annual Intl. Symp. on Microarchitecture, San Jose, CA, Dec. 1994.
    • (1994) 27th Annual Intl. Symp. on Microarchitecture
    • Sprangle, E.1    Patt, Y.2
  • 23
    • 0028767976 scopus 로고
    • The effects of predicated execution on branch prediction
    • San Jose, CA, Dec.
    • G. S. Tyson. The Effects of Predicated Execution on Branch Prediction. In 27th Annual Intl. Symp. on Microarchitecture, pages 196-206, San Jose, CA, Dec. 1994.
    • (1994) 27th Annual Intl. Symp. on Microarchitecture , pp. 196-206
    • Tyson, G.S.1
  • 24
    • 0029514936 scopus 로고
    • Disjoint eager execution: An optimal form of speculative execution
    • Dec.
    • A. K. Uht, V. Sindagi, and K. Hall. Disjoint Eager Execution: An Optimal Form of Speculative Execution. In 28th Intl. Conf. on Microarchitecture, pages 313-325, Dec. 1995.
    • (1995) 28th Intl. Conf. on Microarchitecture , pp. 313-325
    • Uht, A.K.1    Sindagi, V.2    Hall, K.3


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.