Decomposed crossbar switches with multiple input and output buffers

Conference Record / IEEE Global Telecommunications Conference

Volumn 4, Issue , 2001, Pages 2661-2665

  Nam, Seung Yeob ^a   Sung, Dan Keun ^a  

^a Korea Advanced Institute of Science and Technology (KAIST)   (South Korea)

Author keywords

[No Author keywords available]

Indexed keywords

ALGORITHMS; BUFFER CIRCUITS; COMPUTER SIMULATION; CROSSBAR EQUIPMENT; QUEUEING NETWORKS; SWITCHES;

CROSSBAR SWITCHES; INPUT OUTPUT BUFFERS;

SWITCHING SYSTEMS;

EID: 0035685483     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (10)

1. The tiny tera: A small high-bandwidth packet switch core
2. High speed switch scheduling for local area networks
3. Achieving 100% throughput in an input-queued switch
4. A practical scheduling algorithm for achieving 100% throughput in input-queued switches
5. The iSLIP scheduling algorithm for input-queued switches
6. FIRM: A class of distributed scheduling algorithms for high-speed ATM switches with multiple input queues
7. Decomposed arbiters for large crossbars with multi-queue input buffers
8. Two-dimensional round-robin schedulers for packet switches with multiple input queues
9. Matching output queueing with a combined input/output-queued switch
10. A combined input and output queued packet-switched system based on PRIZMA switch-on-a-chip technology