Fast test generation for circuits with RTL and gate-level views

IEEE International Test Conference (TC)

Volumn , Issue , 2001, Pages 1068-1077

  Ravi, Srivaths ^a   Jha, Niraj K ^a  

^a Princeton University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC FAULT CURRENTS; LOGIC CIRCUITS; LOGIC GATES; SHIFT REGISTERS;

BENCHMARK CIRCUITS; REGISTER-TRANSFER LEVEL (RTL) TEST GENERATORS;

INTEGRATED CIRCUIT TESTING;

EID: 0035684163     PISSN: 10893539     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (17)

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