Test response compression and bitmap encoding for embedded memories in manufacturing process monitoring

IEEE International Test Conference (TC)

Volumn , Issue , 2001, Pages 258-267

  Chen, John T ^a   Khare, Jitendra ^b   Walker, Ken ^b   Shaikh, Saghir ^b   Rajski, Janusz ^c   Maly, Wojciech ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

^b INTEL CORPORATION   (United States)

^c MENTOR GRAPHICS CORPORATION   (United States)

Author keywords

BIST; Bitmap; Diagnosis; Embedded memories; Memory repair; Process monitoring; RAM testing

Indexed keywords

ALGORITHMS; BUILT-IN SELF TEST; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; CONDITION MONITORING; EMBEDDED SYSTEMS; ENCODING (SYMBOLS); PROCESS CONTROL;

AUTOMATIC BITMAP RECOGNITION;

STATIC RANDOM ACCESS STORAGE;

EID: 0035680837     PISSN: 10893539     EISSN: None     Source Type: Journal    
DOI: 10.1109/TEST.2001.966641     Document Type: Article

References (14)

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6. Semiconductor manufacturing process monitoring using built-in self-test for embedded memories
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9. Interactive graphical analysis of bit-fail map data using interactive pattern recognition
10. SRAM bitmap shape recognition and sorting using neural networks
11. Compressed bit fail maps for memory fail pattern classification