Device simulation of carrier transport through grain boundaries in lightly doped polysilicon films and dependence on dopant density

Japanese Journal of Applied Physics, Part 1: Regular Papers and Short Notes and Review Papers

Volumn 40, Issue 9 A, 2001, Pages 5237-5243

  Kimura, Mutsumi ^a   Inoue, Satoshi ^a   Shimoda, Tatsuya ^a   Sameshima, Toshiyuki ^b  

^a SEIKO EPSON CORPORATION   (Japan)

^b TOKYO UNIVERSITY OF AGRICULTURE AND TECHNOLOGY   (Japan)

Author keywords

Carrier transport; Defect; Device simulation; Dopant; Electric conductivity; Grain boundary; Lightly dope; Polysilicon; Potential barrier

Indexed keywords

BAND STRUCTURE; CARRIER CONCENTRATION; COMPUTER SIMULATION; ELECTRIC CONDUCTIVITY; ELECTRON TRANSPORT PROPERTIES; ELECTRONIC DENSITY OF STATES; GRAIN BOUNDARIES; IONIZATION; SEMICONDUCTOR DOPING;

CARRIER TRANSPORT; DOPANT DENSITY; POTENTIAL BARRIER;

POLYSILICON;

EID: 0035457018     PISSN: 00214922     EISSN: None     Source Type: Journal    
DOI: 10.1143/jjap.40.5237     Document Type: Article

References (17)