Creation and thermal annealing of interface states induced by uniform or localized injection in 2.3nm thick oxides

Microelectronics Reliability

Volumn 41, Issue 9-10, 2001, Pages 1355-1360

  Zander, D ^a   Saigne F ^a   Meinertzhagen, A ^a  

^a UNIVERSITÉ DE REIMS CHAMPAGNE ARDENNE   (France)

Author keywords

[No Author keywords available]

Indexed keywords

ANNEALING; GATES (TRANSISTOR); HOT CARRIERS; OXIDES;

INTERFACE STATES; LOCALIZED INJECTION;

MOSFET DEVICES;

EID: 0035456913     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(01)00140-8     Document Type: Article

References (4)

1. Bravaix A, Goguenheim D, Revil N, Vincent E, Varrot M, Mortini P. Analysis of high temperature effects on performance and hot-carrier degradation in DC/AC stresses 0.35μm n-MOSFETs. Microelectronics Reliability 1999; 39: 35-44.
2. DiMaria DJ, Stathis JH. Explanation for the oxide thickness dependence of breakdown characteristics of metal-oxide-semiconductor structures. Appl Phys Lett 1997; 70: 2708-10.
3. DiMaria DJ. Defect generation in field-effect transistors under channel-hot-electron stress. Appl Phys 2000; 87: 8707-15.
4. Chen Z, Hess K, Lee J, Lyding JW, Rosenbaum E, Kizilyalli I, Chetlur S. Mechanism for Hot-Carrier-Induced Trap Generation in MOS Transistor. Proc IEDM 1999; 45: 85-9.