Characteristic-impedance measurement error on lossy substrates

IEEE Microwave and Wireless Components Letters

Volumn 11, Issue 7, 2001, Pages 299-301

  Williams, Dylan F ^a,b   Arz, Uwe ^a,c   Grabinski, Hartmut ^c  

^a IEEE   (United States)

^b NATIONAL INSTITUTE OF STANDARDS AND TECHNOLOGY   (United States)

^c LEIBNIZ UNIVERSITY HANNOVER   (Germany)

Author keywords

Characteristic impedance; Measurement; Silicon

Indexed keywords

CHARACTERISTIC IMPEDANCE;

ALGORITHMS; CAPACITANCE; CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ERROR ANALYSIS; INDUCTANCE; MATRIX ALGEBRA; SEMICONDUCTING SILICON; SUBSTRATES;

ELECTRIC IMPEDANCE;

EID: 0035401727     PISSN: 15311309     EISSN: None     Source Type: Journal    
DOI: 10.1109/7260.933777     Document Type: Article

References (13)

1. Accurate characteristic impedance measurement on silicon
2. Comparison of on-wafer calibrations
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4. High-speed VLSI interconnect modeling based on S-parameter measurements
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6. Full-wave analysis of conductor losses on MMIC transmission lines
7. Asymmetric coupled CMOS lines: An experimental study
8. A multiline method of network analyzer calibration
9. A general waveguide circuit theory
10. Compensation for substrate permittivity in probe-tip calibration
11. Contact-pad design for high-frequency silicon measurements
12. An accurate determination of the characteristic impedance of lossy lines on chips based on high frequency S-parameter measurements
13. A new method for characteristic impedance determination on lossy substrate