New procedure for the extraction of basic a-Si:H TFT model parameters in the linear and saturation regions

Solid-State Electronics

Volumn 45, Issue 7, 2001, Pages 1077-1080

  Cerdeira, A ^a   Estrada, M ^a   Garcia R ^a   Ortiz Conde, A ^a   Garcia Sanchez F J ^b  

^a DEPARTAMENTO DE FÍSICA   (Mexico)

^b UNIVERSIDAD SIMÓN BOLÍVAR   (Venezuela)

Author keywords

a Si:H transistor model; AIM spice models; Amorphous transistor; Parameter extraction; TFT

Indexed keywords

CAPACITANCE; COMPUTER SIMULATION; FERMI LEVEL; INTEGRAL EQUATIONS; PARAMETER ESTIMATION; PERMITTIVITY;

AMORPHOUS TRANSISTORS;

THIN FILM TRANSISTORS;

EID: 0035390039     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(01)00143-5     Document Type: Article

References (7)

1. SPICE models for amorphous and polysilicon thin film transistors
2. A simple procedure to extract the threshold voltage of amorphous thin film transistors in the saturation region
3. Hydrogenated amorphous silicon thin film transistor fabricated on plasma treated silicon nitride