Equipotential shells for efficient inductance extraction

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 20, Issue 1, 2001, Pages 70-79

  Beattie, Michael ^b   Krauter, Byron ^a,c   Alatan, Lale ^a,d   Pileggi, Lawrence ^b  

^a IEEE

^b CARNEGIE MELLON UNIVERSITY   (United States)

^c IBM   (United States)

^d MIDDLE EAST TECHNICAL UNIVERSITY   (Turkey)

Author keywords

Circuit; Inductance; Interconnect; Modeling

Indexed keywords

COUPLED CIRCUITS; INDUCTANCE; INTERCONNECTION NETWORKS; MATHEMATICAL MODELS; MATRIX ALGEBRA; MICROPROCESSOR CHIPS;

EQUIPOTENTIAL SHELLS; INDUCTANCE EXTRACTION; PARASITIC COUPLINGS;

INTEGRATED CIRCUIT LAYOUT;

EID: 0035057366     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.905676     Document Type: Article

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