Cycle-true leakage current modeling for CMOS gates

ISCAS 2001 - 2001 IEEE International Symposium on Circuits and Systems, Conference Proceedings

Volumn 5, Issue , 2001, Pages 507-510

  Eckerbert, Daniel ^a   Larsson Edefors, Per ^a  

^a LINKÖPING UNIVERSITY   (Sweden)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; EMITTER COUPLED LOGIC CIRCUITS; GATES (TRANSISTOR); LEAKAGE CURRENTS; SEMICONDUCTOR DEVICE MODELS;

CMOS GATE; COMPLEX DYNAMIC BEHAVIOR; GATE LEAKAGES; LEAKAGE CURRENT MODELING; LEAKAGE POWER; MODEL APPROACH; SHORT-CIRCUIT POWER; STATIC LEAKAGE; LEAKAGE POWER ESTIMATION;

LEAKAGE CURRENTS; CMOS INTEGRATED CIRCUITS;

EID: 0035008521     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/iscas.2001.922096     Document Type: Conference Paper

References (6)

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