Efficient timing analysis for CMOS circuits considering data dependent delays

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 17, Issue 6, 1998, Pages 546-552

  Sun, Shang Zhi ^a   Du, David H C ^a   Chen, Hsi Chuan ^a  

^a UNIVERSITY OF MINNESOTA   (United States)

Author keywords

Cmos circuits; Long and short path; Sensitizable path

Indexed keywords

ALGORITHMS; DELAY CIRCUITS; PERFORMANCE; SENSITIVITY ANALYSIS; TIME DOMAIN ANALYSIS; TOPOLOGY;

TIMING ANALYSIS;

CMOS INTEGRATED CIRCUITS;

EID: 0032092989     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/43.703835     Document Type: Article

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